Semiconductor History | 844 East Charleston Road, January 1959 — The Notebook Page That Made Chips Manufacturable

On 14 January 1959 Jean Hoerni showed Robert Noyce and a patent attorney the latest version of his planar process, in which a transistor is built flat and left under a protective skin of silicon dioxide.

The attorney, John Ralls, asked what else the process might be good for.

Nine days later Noyce wrote the answer on pages 70 and 71 of his patent notebook, under the heading Methods of isolating multiple devices, and dated it 23 January 1959.

If the oxide was an insulator, metal could be evaporated on top of it to wire several transistors together while they were still in the wafer, as part of making them rather than afterwards.

That is the modern chip, and the notebook page is the earliest written form of it.

Jack Kilby had already built a working integrated circuit at Texas Instruments the previous September, in germanium, with wires soldered on by hand. Kilby's device proved the principle; Noyce's scheme provided a way to make millions of them.

Neither man invented the integrated circuit alone, and the honest version needs at least four names.

Hoerni's planar process is the platform, and Kurt Lehovec at Sprague Electric had shown that reverse-biased junctions could isolate components sharing a substrate.

Kilby proved a monolithic circuit could work at all, and Noyce combined the available pieces into something a factory could repeat.

The first working planar monolithic circuits came out of Jay Last's group at Fairchild in May 1960, which is a fifth set of hands.

Noyce filed for a patent on a semiconductor device-and-lead structure on 30 July 1959, five months after Kilby filed, and was granted US 2,981,877 first, on 25 April 1961.

Then came a decade of interference proceedings between the two companies, settled in practice by a cross-licence and a net payment to Fairchild rather than by anybody winning.

Both plaques at this address are worth reading together, and both are outdoors at the front door.

California Historical Landmark No. 1000 was placed in August 1991 and credits Noyce with the first commercially practicable integrated circuit. The IEEE Milestone next to it, from May 2009, names Hoerni's planar process and Noyce's circuit in the same sentence, which is the more accurate telling and took eighteen more years to arrive.

Photo: pukasoft, CC BY-SA 3.0, via Wikimedia Commons (California Historical Landmark No. 1000 and the IEEE Milestone plaque at 844 East Charleston Road).

Photo: Dforouhari, CC BY-SA 4.0, via Wikimedia Commons (the IEEE Milestone plaque).