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- Semiconductor History | Moscone West, 18 September 2007 — Tick-Tock Makes a Metronome Out of Moore’s Law
Semiconductor History | Moscone West, 18 September 2007 — Tick-Tock Makes a Metronome Out of Moore’s Law
· 2007-9
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Semiconductor History | Moscone West, 18 September 2007 — Tick-Tock Makes a Metronome Out of Moore’s Law
kevin
On 18 September 2007, Intel used its Developer Forum at Moscone Center West to set out a product rhythm it called tick-tock. One beat moved a proven architecture to a smaller manufacturing process; the next introduced a new microarchitecture on the established process.
The immediate examples were Penryn and Nehalem. Penryn brought Intel’s Core design to 45 nanometers with high-k metal-gate transistors, while Nehalem was intended to follow with a redesigned architecture, integrated memory control, and new system connections.
The good was organizational clarity. Separating a major process change from a major architecture change reduced the number of unproven elements arriving together, gave software and computer makers a visible roadmap, and helped Intel deliver a sequence that included Westmere, Sandy Bridge, Ivy Bridge, and Haswell.
Tick-tock also converted manufacturing leadership into a repeatable commercial promise. A process shrink could improve density, power, and cost, while the alternating architecture release created a reason for customers to upgrade even when transistor geometry was held relatively steady.
The weakness was hidden inside the regularity. The model assumed that each new process node would be ready close to schedule, so delays in manufacturing could disrupt the architecture planned to use it and ripple through several product generations.
That assumption became increasingly difficult to sustain. Intel’s later regulatory filings described major architecture introductions as occurring roughly every two to three years, and the company eventually added a third optimization phase as prolonged 14-nanometer production and delayed 10-nanometer volume manufacturing broke the clean alternation.
The cover is a later community-created roadmap illustration, not a photograph of the 2007 keynote. Its alternating process nodes and architectures visualize both the appeal and the fragility of the system: a neat sequence on paper that depends on physics, factories, design teams, and markets remaining synchronized.
Tick-tock deserves neither simple nostalgia nor dismissal. It was a disciplined way to manage enormous technical risk and helped produce some of Intel’s strongest product years, but its memorable name also made the eventual loss of cadence impossible to hide.
Illustration: Mliu92 and predecessor contributors, CC BY-SA 4.0, via Wikimedia Commons
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