Semiconductor History | 2200 Mission College Boulevard, 26 April 2018 - Intel Moves 10-Nanometer Volume Production Again
· 2018-4
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Semiconductor History | 2200 Mission College Boulevard, 26 April 2018 - Intel Moves 10-Nanometer Volume Production Again
kevin
This opened computer board contains a rare piece of Intel's delayed 10-nanometer generation: a Cannon Lake Core i3-8121U, its exposed processor and chipset photographed beside a separate AMD graphics chip.
On 26 April 2018, Intel reported from Santa Clara that it was shipping 10-nanometer products in low volume. In the same earnings release, the company moved volume production into 2019 because yields were improving more slowly than expected.
The wording captured an uncomfortable gap between making some working chips and manufacturing enough good chips economically.
Intel had built its long dominance on controlling both processor design and leading-edge fabrication. A regular cadence of new processes let it pack in more transistors, improve performance and efficiency, and spread enormous factory costs across high-volume products.
At 10 nanometers, that cadence broke.
Intel had pursued aggressive density targets and complex process steps, but repeated yield problems kept mainstream products on the mature 14-nanometer process longer than planned. The delay constrained product choices just as competitors using outside foundries were moving quickly.
Cannon Lake showed the difference between a technical milestone and a healthy product family.
The Core i3-8121U reached the market in limited systems, proving that Intel could ship a 10-nanometer CPU. Its small footprint and disabled integrated graphics also made it a symbol of a process that was not yet ready to support the broad lineup customers expected.
Intel did reach high-volume 10-nanometer production with Ice Lake in 2019, and later renamed its process nodes as the company rebuilt its manufacturing roadmap. Recovery, however, could not restore the years in which product plans, factory economics, and public credibility had been compressed by delay.
The bad chapter was not that one announced date slipped.
It was that a manufacturing system designed around predictable leadership lost that predictability, exposing how deeply Intel's chip designs and business promises depended on its factories. The exposed dies in the photograph make that dependence tangible: architecture only becomes a product when a process can reproduce it at scale.
Photo: FritzchensFritz, CC0 1.0, via Wikimedia Commons. The photograph shows a Cannon Lake NUC board, not the earnings announcement itself.
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